Figure 6.8-18 Pwm Pulse Generation; Figure 6.8-19 Pwm 0% To 100% Pulse Generation; Table 6.8.5-1 Pwm Pulse Generation Event Priority For Up-Counter - Nuvoton ISD94124BYI Technical Reference Manual

Center
CMPDATm
CMPDATn
Zero
PWM OUT
The generation events may sometimes set to the same value, as the reason, events priority
between different counter types are list below, up counter type(Table 6.8.5-1), down counter type
(Table 6.8.5-2) and up-down counter type (Table 6.8.5-3). By using event priority, user can easily
generate 0% to 100% duty pulse as shown in Figure 6.8-19.
PWM period
CMPU = L
Zero = H
0
CMPDAT = 0, 0% Duty
CMPDAT = 1, 20% Duty
CMPDAT = 2, 40% Duty
CMPDAT = 3, 60% Duty
CMPDAT = 4, 80% Duty
CMPDAT > 4,100% Duty

Figure 6.8-19 PWM 0% to 100% Pulse Generation

Priority
1 (Highest) Period event (CNT = PERIOD)
2 Compare up event of odd channel (CNT = CMPUm)
3 Compare up event of even channel (CNT = CMPUn)
4 (Lowest) Zero event (CNT = zero)

Table 6.8.5-1 PWM Pulse Generation Event Priority for Up-Counter

Sep 9, 2019
ISD94100 Series Technical Reference Manual
4
CNT
3 5
6
2
1
PWM period
Note: 1. Zero = L
2. CMPUn = X
3. CMPUm = H
4. Center = X
5. CMPDm = X
6. CMPDn = L

Figure 6.8-18 PWM Pulse Generation

PWM period
4 4
3 3
2 2
1 1
0
CMPDAT = 0, 0% Duty
CMPDAT = 1, 25% Duty
CMPDAT = 2, 50% Duty
CMPDAT = 3, 75% Duty
CMPDAT = 4, 100% Duty
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Center
3
CMPDATm
2
CMPDATn
Zero 1
PWM OUT
PWM period
Note: 1. Zero = H
2. CMPUn = T
3. CMPUm = H
4. Center = L
5. CMPDm = T
6. CMPDn = L
PWM period
4
3 3
2 2
CMPU = L
1
CMPD = H
0
DIRF
Up Event
4
CNT
5
6
PWM period
4
3 3
2 2
1 1 1
0 0
Rev1.09