Register Map - Nuvoton ISD94124BYI Technical Reference Manual

6.12.6 Register Map

R: read only, W: write only, R/W: both read and write
Register Offset
UART Base Address:
UART0_BA = 0x4007_0000
UART_DAT UART0_BA+0x00
UART_INTEN
UART0_BA+0x04
UART_FIFO UART0_BA+0x08
UART_LINE UART0_BA+0x0C
UART_MODEM UART0_BA+0x10
UART_MODEMSTS UART0_BA+0x14
UART_FIFOSTS UART0_BA+0x18
UART_INTSTS UART0_BA+0x1C
UART_TOUT UART0_BA+0x20
UART_BAUD
UART0_BA+0x24
UART_ALTCTL UART0_BA+0x2C
UART_FUNCSEL UART0_BA+0x30
UART_BRCOMP UART0_BA+0x3C
UART_WKCTL
UART0_BA+0x40
UART_WKSTS UART0_BA+0x44
UART_DWKCOMP UART0_BA+0x48
Note:
1. Any register not listed here is reserved and must not be written. The result of a read operation on these bits is undefined.
2. The reserved register fields that listed in register description must be written to their reset value. Writing reserved fields with
other than reset values may produce undefined results.
Sep 9, 2019
ISD94100 Series Technical Reference Manual
R/W Description
R/W UART Receive/Transmit Buffer Register
R/W UART Interrupt Enable Register
R/W UART FIFO Control Register
R/W UART Line Control Register
R/W UART Modem Control Register
R/W UART Modem Status Register
R/W UART FIFO Status Register
R/W UART Interrupt Status Register
R/W UART Time-out Register
R/W UART Baud Rate Divider Register
R/W UART Alternate Control/Status Register
R/W UART Function Select Register
R/W UART Baud Rate Compensation Register
R/W UART Wake-up Control Register
R/W UART Wake-up Status Register
R/W UART Incoming Data Wake-up Compensation Register 0x0000_0000
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Reset Value
0x0000_0000
0x0000_0000
0x0000_0101
0x0000_0000
0x0000_0200
0x0000_0110
0xB040_4000
0x0040_0002
0x0000_0000
0x0F00_0000
0x0000_000C
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
Rev1.09