System Manager; Overview; System Reset - Nuvoton ISD94124BYI Technical Reference Manual

6.2 System Manager

6.2.1

Overview

System management includes the following sections:


System Reset


System Power Distribution

SRAM Memory Organization

System Timer (SysTick)

Nested Vectored Interrupt Controller (NVIC)

System Control register
6.2.2 System Reset
A system reset sets all registers to their reset values except some of the registers listed in Table
6.2.2-1, which will maintain their original values after reset.
A system reset can be triggered by one of the nine sources listed below. The reset source can be
identified by checking the reset flag bits in the System Reset Status Register (SYS_RSTSTS).

Hardware Reset Sources
-
Power-on Reset
-
Low level on the nRESET pin
-
Watchdog Time-out Reset and Window Watchdog Reset (WDT/WWDT Reset)
-
Low Voltage Reset (LVR)
-
Brown-out Detector Reset (BOD Reset)
-
CPU Lockup Reset

Software Reset Sources
-
CHIP Reset: writing 1 to CHIPRST (SYS_IPRST0[0]) will reset whole chip.
-
MCU Reset: writing 1 to SYSRESETREQ (AIRCR[2]) will reboot the device,
according to the boot selection defined in configuration byte CONFIG0.
-
CPU Reset: writing 1 to CPURST (SYS_IPRST0[1]) will reset Cortex
Only.
nRESET
~50k ohm
@3.3v
V
DD
Low Voltage
WDT/WWDT
CPU Lockup
CHIP Reset
CHIPRST(SYS_IPRST0[0])
MCU Reset
SYSRSTREQ(AIRCR[2])
CPU Reset
CPURST(SYS_IPRST0[1])
Sep 9, 2019
ISD94100 Series Technical Reference Manual
POROFF(SYS_PORCTL[15:0])
Power-on
Reset
LVREN(SYS_BODCTL[7])
Reset
BODRSTEN(SYS_BODCTL[3])
Brown-out
Reset
Reset
Reset
Software Reset
Page 49 of 928
Glitch Filter
66 us
Reset Pulse Width
~3.2ms
Reset Pulse Width
64 WDT clocks
Reset Pulse Width
2 system clocks
Reset Pulse Width
2 system clocks
®
-M4 core
System Reset
Rev1.09