Functional Description; Figure 6.19-2 Dmic Clock Control Diagram - Nuvoton ISD94124BYI Technical Reference Manual

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The DMIC module is reset by DMICRST (SYS_IPRST1[15]).

Pin configuration

6.19.5 Functional Description

6.19.5.1 DMIC Woking Main Clock Generator

The DMIC module has four clock sources selected by DMICSEL (CLK_CLKSEL2[11:10]). The

frequency of the DMIC working main clock (DMIC_MCLK) must be less than 30MHz. The DMIC

clock control diagram is shown in Figure 6.19-2.

DMICSEL (CLK_CLKSEL2 [11:10])

6.19.5.2 DMIC Bus Clock Generator

To generate DMIC bus clock (DMIC_CLK) based on DMIC working main clock (DMIC_MCLK)

F_DMIC_CLK = F_DMIC_MCLK/(1 + MCLKDIV).

Where F_DMIC_CLK is the frequency of DMIC_CLK and F_DMIC_MCLK is the frequency of

ISD94100 Series Technical Reference Manual

DMICCKEN (CLK_APBCLK0 [15])

1/(PCLKDIV+1)

PCLKDIV = DMIC_DIV[7:0]

Page 867 of 928

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