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SCL from
master
Data output by
transmitter
Data output
by receiver
6.13.5.1.5 Complete I2C Communication Flow
The following figures illustrate how an I2C master initiates and completes a read/write operation
with a 7-bit or 10-bit slave.
•
Master transmits data to a slave with 7-bit address
S
SLAVE ADDRESS
from master to slave
from slave to master
Figure 6.13-8 Master Transmits Data to Slave by 7-bit
•
Master reads data from a slave with 7-bit address
S
SLAVE ADDRESS
Figure 6.13-9 Master Reads Data from Slave by 7-bit
•
Master transmits data to a slave with 10-bit address
The header byte contains 10-bit address indicator (5'b11110), two most significant address bits and
Sep 9, 2019
ISD94100 Series Technical Reference Manual
1
S
START
condition
Figure 6.13-7 Acknowledge on the I
R/W
A
DATA
'0' : write
A = acknowledge (SDA low)
A = not acknowledge (SDA high)
S = START condition
P = STOP condition
R/W
A
DATA
'1' : read
Page 623 of 928
Clock pulse for
acknowledgement
2
8
not acknowlegde
acknowlegde
2
C Bus
A
DATA
data transfer
(n bytes + acknowlegde)
A
DATA
data transfer
(n bytes + acknowlegde)
9
A/A
P
A/A
P
Rev1.09
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