Figure 6.13-16 Gc Mode - Nuvoton ISD94124BYI Technical Reference Manual

Isd arm cortex-m4f soc
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6.13.5.2.4
General Call (GC) Mode
If the GC bit (I2C_ADDRn [0]) is set, the I
(00H). User can clear GC bit to disable general call function. When the GC bit is set and the I
Slave mode, it can receive the general call address by 0x00 after master send general call address
2
to I
C bus, then it will follow status of GC mode.
The GC mode can wake up when address matched. Notice that the default address is 0x00, but
user must set an address except for 0x00.
Switch to not addressed mode
Address 0x0 will be recognized
...
(STA,STO,SI,AA)=(0,0,1,1)
GC=1
Master to Slave
Slave to Master
Arbitraion Lost
2
If I
C is still receiving data in GC mode but got a STOP or Repeat START, the status code will be
0xA0. User could follow the action for status code 0x98 in above figure when getting 0xA0 status.
Sep 9, 2019
ISD94100 Series Technical Reference Manual
2
C port hardware will respond to General Call address
Sr
STATUS=0x70
I2C_DAT
S
ACK
(SLA+W=0x00)
(Arbitration Lost)
STATUS=0x78
I2C_DAT
ACK
(SLA+W=0x00)
(STA,STO,SI,AA)=(0,0,1,X)
Switch to not addressed mode
Own SLA will be recognized
Send START when bus free
...
S
...
(STA,STO,SI,AA)=(1,0,1,1)
Switch to not addressed mode
Own SLA will not be recognized
Send START when bus free
...
S
...
(STA,STO,SI,AA)=(1,0,1,0)
Switch to not addressed mode
Own SLA will be recognized
...
Become I
(STA,STO,SI,AA)=(0,0,1,1)
Switch to not addressed mode
Own SLA will not be recognized
...
Bus Free
(STA,STO,SI,AA)=(0,0,1,0)

Figure 6.13-16 GC Mode

Page 634 of 928
STATUS=0x90
I2C_DAT
(Data)
(STA,STO,SI,AA)=(0,0,1,1)
STATUS=0x98
I2C_DAT
(Data)
(STA,STO,SI,AA)=(0,0,1,0)
STATUS=0xA0
P
(STA,STO,SI,AA)=(0,0,1,X)
STATUS=0xA0
Sr
...
(STA,STO,SI,AA)=(0,0,1,1)
2
Become I
C Master
2
Become I
C Master
2
C Slave
2
C in
ACK
NAK
Sr
Rev1.09

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