Basic Configuration; Figure 6.13-1 I 2 C Controller Block Diagram - Nuvoton ISD94124BYI Technical Reference Manual

Control Register
Bus Clock Control
Note: n = 0 or 1

6.13.4 Basic Configuration

6.13.4.1 I2C0 Basic Configurations

Clock source configuration
–
Enable I2C0 peripheral clock in I2C0CKEN (CLK_APBCLK0[8]).

Reset configuration
–
Reset I2C0 controller in I2C0RST (SYS_IPRST1[8]).

Pin configuration
Group Pin Name
I2C0_SCL
I2C0
I2C0_SDA
Sep 9, 2019
ISD94100 Series Technical Reference Manual
APB Interface
Wakeup Control
Interface Control
Management
2
Figure 6.13-1 I C Controller Block Diagram
GPIO
PA.9
PB.0
PB.6
PC.13
PD.0
PD.8
PD.14
PA.10
PB.1
PB.5
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Bus Protocol
Bus
Control
I2Cn_SCL
I2Cn_SDA
I2Cn_SMBAL
I2Cn_SMBSUS
MFP
MFP1
MFP2
MFP3
MFP2
MFP3
MFP4
MFP3
MFP1
MFP2
MFP3
Rev1.09