Timer Registers - Analog Devices Blackfin ADSP-BF537 Hardware Reference Manual

Timer Registers

Table A-6. SPI Controller Registers (Cont'd)
Memory-mapped
Address
0xFFC0 050C
0xFFC0 0510
0xFFC0 0514
0xFFC0 0518
Timer Registers
Timer registers (0xFFC0 0600 – 0xFFC0 06FF) are listed in
Table A-7. Timer Registers
Memory-mapped
Address
0xFFC0 0600
0xFFC0 0604
0xFFC0 0608
0xFFC0 060C
0xFFC0 0610
0xFFC0 0614
0xFFC0 0618
0xFFC0 061C
0xFFC0 0620
A-6
Register Name
SPI_TDBR
SPI_RDBR
SPI_BAUD
SPI_SHADOW
Register Name
TIMER0_CONFIG
TIMER0_COUNTER
TIMER0_PERIOD
TIMER0_WIDTH
TIMER1_CONFIG
TIMER1_COUNTER
TIMER1_PERIOD
TIMER1_WIDTH
TIMER2_CONFIG
ADSP-BF537 Blackfin Processor Hardware Reference
See Page
"SPI Transmit Data Buffer Register" on
page 10-44
"SPI Receive Data Buffer Register" on
page 10-44
"SPI Baud Rate Register" on page 10-41
"SPI RDBR Shadow Register" on page 10-44
See Page
"Timer Configuration Registers" on
page 15-44
"Timer Counter Registers" on page 15-46
"Timer Period Registers" on page 15-48
"Timer Width Registers" on page 15-49
"Timer Configuration Registers" on
page 15-44
"Timer Counter Registers" on page 15-46
"Timer Period Registers" on page 15-48
"Timer Width Registers" on page 15-49
"Timer Configuration Registers" on
page 15-44
Table A-7.