Analog Devices Blackfin ADSP-BF537 Hardware Reference Manual page 1143

Glossary
dirty, modified.
A state bit, stored along with the tag, indicating whether the data in the
data cache line has been changed since it was copied from the source
memory and, therefore, needs to be updated in that source memory.
DMA.
See Direct Memory Access
DMA Access Bus (DAB).
A bus that provides a means for DMA channels to be accessed by the
peripherals.
DMA chaining.
The linking or chaining of multiple direct memory access (DMA)
sequences. In chained DMA, the I/O processor loads the next DMA
descriptor into the DMA parameter registers when the current DMA fin-
ishes and autoinitializes the next DMA sequence.
DMA Core Bus (DCB).
A bus that provides a means for DMA channels to gain access to on-chip
memory.
DMA descriptor registers.
Registers that hold the initialization information for a direct memory
access (DMA) process.
DMA External Bus (DEB).
A bus that provides a means for DMA channels to gain access to off-chip
memory.
ADSP-BF537 Blackfin Processor Hardware Reference G-7