Analog Devices Blackfin ADSP-BF537 Hardware Reference Manual page 1157

register (
EBIU_SDGCTL
the SDC to exit SDRAM from self-refresh mode. See
Mode" on page 6-35
Serial Peripheral Interface (SPI).
A synchronous serial protocol used to connect integrated circuits.
serial ports (SPORTs).
A high speed synchronous input/output device on the processor. The pro-
cessor uses two synchronous serial ports that provide inexpensive
interfaces to a wide variety of digital and mixed-signal peripheral devices.
set.
A group of N-line storage locations in the ways of an N-way cache,
selected by the index field of the address.
set associative.
Cache architecture that limits line placement to a number of sets (or
ways).
shifter.
A computational unit that completes logical and arithmetic shifts.
SIC (System Interrupt Controller).
Part of the processor's two-level event control mechanism. The SIC works
with the Core Event Controller (CEC) to prioritize and control all system
interrupts. The SIC provides mapping between the peripheral interrupt
sources and the prioritized general-purpose interrupt inputs of the core.
SIMD (Single Instruction, Multiple Data).
A parallel computer architecture in which multiple data operands are pro-
cessed simultaneously using one instruction.
ADSP-BF537 Blackfin Processor Hardware Reference
) and any access to the SDRAM address space causes
and "Exit Self-Refresh Mode" on page
Glossary
"Enter Self-Refresh
6-36.
G-21