Analog Devices Blackfin ADSP-BF537 Hardware Reference Manual page 852

Description of Operation
Table 14-2. GPIO Value Register Pin Interpretation
POLAR
0
0
1
1
X
For GPIOs configured as edge-sensitive, a readback of 1 from one
of these registers is sticky. That is, once it is set it remains set until
cleared by user code. For level-sensitive GPIOs, the pin state is
checked every cycle, so the readback value will change when the
original level on the pin changes.
The state of the output is reflected on the associated pin only if the func-
tion enable bit in the
Write operations to the GPIO data registers modify the state of all GPIOs
of a port. In cases where only one or a few GPIOs need to be changed, the
user may write to the GPIO set registers,
registers,
PORTxIO_CLEAR
instead.
While a direct write to a GPIO data register alters all bits in the register,
writes to a GPIO set register can be used to set a single or a few bits only.
No read-modify-write operations are required. The GPIO set registers are
write-1-to-set registers. All 1s contained in the value written to a GPIO set
register sets the respective bits in the GPIO data register. The 0s have no
effect. For example, assume that
14-12
EDGE BOTH
0 X
1 0
0 X
1 0
1 1
register is cleared.
PORTx_FER
, or to the GPIO toggle registers,
PF0
ADSP-BF537 Blackfin Processor Hardware Reference
Effect of MMR Settings
Pin that is high reads as 1; pin that is
low reads as 0
If rising edge occurred, pin reads as 1;
otherwise, pin reads as 0
Pin that is low reads as 1; pin that is
high reads as 0
If falling edge occurred, pin reads as 1;
otherwise, pin reads as 0
If any edge occurred, pin reads as 1; oth-
erwise, pin reads as 0
, the GPIO clear
PORTxIO_SET
is configured as an output. Writing
PORTxIO_TOGGLE