Analog Devices Blackfin ADSP-BF537 Hardware Reference Manual page 1141

Glossary
Core Event Controller (CEC).
The CEC works with the System Interrupt Controller (SIC) to prioritize
and control all system interrupts. The CEC handles general-purpose inter-
rupts and interrupts routed from the SIC.
CPLB.
See Cacheability Protection Lookaside Buffer
DAB.
See DMA Access Bus
DAG.
See Data Address Generator
Data Address Generator (DAG).
Processing component that provides memory addresses when data is trans-
ferred between memory and registers.
Data Register File.
A set of data registers that is used to transfer data between computation
units and memory while providing local storage for operands.
data registers (Dreg).
Registers located in the data arithmetic unit that hold operands and results
for multiplier, ALU, or shifter operations.
DCB.
See DMA Core Bus
DEB.
See DMA External Bus
ADSP-BF537 Blackfin Processor Hardware Reference G-5