Sport Registers - Analog Devices Blackfin ADSP-BF537 Hardware Reference Manual

TSCLK
TFS
DT
DT REPRESENTS DTxPRI AND/OR DTxSEC, DEPENDING ON DESIRED CONFIGURATION.
Figure 12-23. SPORT Transmit, Unframed Mode, Normal Framing
TSCLK
TFS
DT
DT REPRESENTS DTxPRI AND/OR DTxSEC, DEPENDING ON DESIRED CONFIGURATION.
Figure 12-24. SPORT Transmit, Unframed Mode, Alternate Framing

SPORT Registers

The following sections describe the SPORT registers.
an overview of the available control registers.
Table 12-5. SPORT Register Mapping
Register Name
SPORTx_TCR1
SPORTx_TCR2
SPORTx_TCLK_DIV
ADSP-BF537 Blackfin Processor Hardware Reference
B3 B2 B1 B0
B3 B2 B1 B0
Function
Primary transmit
configuration regis-
ter
Secondary trans-
mit configuration
register
Transmit clock
divider register
SPORT Controllers
B3 B2 B1 B0
B3 B2 B1 B0
Table 12-5
Notes
Bits [15:1] can only be written if bit 0 = 0
Ignored if external SPORT clock mode is
selected
B3 B2
B3 B2
provides
12-45