External Interface - Analog Devices Blackfin ADSP-BF537 Hardware Reference Manual

Interface Overview
PAB
16
SCLK
TMRCLK
TACLK0
TMR0
Figure 15-2. Internal Timer Structure

External Interface

Every timer has a dedicated
enabled, the
TMRx
by the timer. They function as input in capture and counter modes. Polar-
ity of the signals is programmable.
The timer outputs
sink higher current than others. See the product data sheet for details.
15-4
TIMER0_CONFIG
TIMER0_PERIOD (WRITE)
32
TIMER0_PERIOD (READ)
32
COMPARATOR
32
TIMER0_COUNTER
32
COMPARATOR
32
TIMER0_WIDTH (READ)
32
TIMER0_WIDTH (WRITE)
TMRx
pins output the single-pulse or PWM signals generated
to connect to pin drivers that can source and
TMR2 TMR7
ADSP-BF537 Blackfin Processor Hardware Reference
LEADING EDGE
32
PERIOD
MATCH
OVERFLOW
WIDTH MATCH
TRAILING EDGE
pin that can be found on port F. If
TIMER 0
TIMEN0
ENABLE
LATCH
TIMDIS0
TRUN0
TOVF_ERR0
INTERRUPT
CONTROL
TIMIL0
PIN
TMR0
CONTROL
EDGE
DETECTOR
TACI0