Analog Devices Blackfin ADSP-BF537 Hardware Reference Manual page 1151

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Table of Contents

See Least Significant Bit

MAC (Media Access Control).

The Ethernet MAC provides a 10/100Mbit/s Ethernet interface, compli-

ant to IEEE Std. 802.3-2002, between an MII (Media Independent

Interface) and the Blackfin peripheral subsystem.

MAC (Multiply/Accumulate).

A mathematical operation that multiplies two numbers and then adds a

third to get the result (see Multiply Accumulator).

Memory Management Unit (MMU).

A component of the processor that supports protection and selective cach-

ing of memory by using Cacheability Protection Lookaside Buffers

Mode register.

Internal configuration registers within SDRAM devices which allow speci-

fication of the SDRAM device's functionality.

modified addressing.

The process whereby the Data Address Generator (DAG) produces an

address that is incremented by a value or the contents of a register.

Modify register.

A Data Address Generator (DAG) register that provides the increment or

step size by which an index register is pre- or post-modified during a regis-

ADSP-BF537 Blackfin Processor Hardware Reference