Core And System Reset - Analog Devices Blackfin ADSP-BF537 Hardware Reference Manual

Reset and Powerup

Core and System Reset

To perform a system and core reset, use the code sequence shown in
Listing 19-1.
Listing 19-1. Core and System Reset
/* Issue system soft reset */
P0.L = LO(SWRST) ;
P0.H = HI(SWRST) ;
R0.L = 0x0007 ;
W[P0] = R0 ;
SSYNC ;
/* Clear system soft reset */
R0.L = 0x0000 ;
W[P0] = R0 ;
SSYNC ;
/* Core reset - forces reboot */
RAISE 1 ;
Reset Vector
When reset releases in no-boot mode (
fetching and executing instructions from off-chip memory at address
0x2000 0000. In all other boot modes the processor starts program execu-
tion at address 0xEF00 0000 which is populated by the on-chip boot
ROM.
On a hardware reset the boot kernel initializes the
0000. When the booting process completes, the boot kernel jumps to the
location provided by the
19-8
vector register. If bit 4 of the
EVT1
ADSP-BF537 Blackfin Processor Hardware Reference
=b#000), the processor starts
BMODE
register to 0xFFA0
EVT1
register
SYSCR