Analog Devices Blackfin ADSP-BF537 Hardware Reference Manual page 1035

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(MASTER SPI DEVICE)

Figure 19-22. Connections Between Host (SPI Master) and Blackfin Pro-

cessor (SPI Slave)

In SPI slave mode the

handshake signal can operate on any GPIO pin of port F, G or H. The

resistor shown in

the host when high. See

for further details. The SPI module does not provide

extremely large receive FIFOs, so the host is requested to test the

signal at every byte.

Below are timing diagrams of an SPI slave mode boot using an

ADSP-BF536 processor as the host and an ADSP-BF537 processor as the

slave SPI device. On the host side,

of the slave ADSP-BF537. The SPI slave's

(ADSP-BF537 processor) functions as

host (ADSP-BF536 processor). All the timing diagrams are from the SPI

slave point of view.

The loader file used (

Figure 19-12 on page

the functionality of this boot mode—a ZEROFILL block going to loca-

tion 0xFFA0 0300 with a byte count of 0x4000 and a data block going to

ADSP-BF537 Blackfin Processor Hardware Reference

FLAG/INTERRUPT

functionality must be activated. The

Figure 19-15 on page 19-41

"Host Wait Feedback Strobe (HWAIT)" on

SPI_Slave_HostFile.ldr

19-38, except two more blocks are added to show

System Reset and Booting

ADSP-BF534/BF536/BF537

(SLAVE SPI DEVICE)

is used as the

which is connected

and connects to

) is the same one as in