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21 SYSTEM DESIGN
This chapter provides hardware, software and system design information
to aid users in developing systems based on the Blackfin processor. The
design options implemented in a system are influenced by cost, perfor-
mance, and system requirements. In many cases, design issues cited here
are discussed in detail in other sections of this manual. In such cases, a ref-
erence appears to the corresponding section of the text, instead of
repeating the discussion in this chapter.
Pin Descriptions
Refer to the processor data sheet for pin information, including pin num-
bers for the 208-ball Pb-free sparse MBGA and 182-ball MBGA.
Managing Clocks
Systems can drive the clock inputs with a crystal oscillator or a buffered,
shaped clock derived from an external clock oscillator. The external clock
connects to the processor's
operate
CLKIN
processor uses the clock input (
include the core clock (
ADSP-BF537 Blackfin Processor Hardware Reference
CLKIN
below the specified frequency during normal operation. The
) and the peripheral clock (
CCLK
pin. It is not possible to halt, change, or
) to generate on-chip clocks. These
CLKIN
).
SCLK
21-1
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