Analog Devices Blackfin ADSP-BF537 Hardware Reference Manual page 1080

Programming Examples
R2 = DEPOSIT(R1, R7);
new VLEV field */
W[P0] = R2;
CLI R1; /* disable interrupts, copy IMASK to R1 */
IDLE; /* drain pipeline, enter idled state, wait for PLL wakeup
*/
STI R1; /* after PLL wakeup occurs, restore interrupts and
IMASK */
/* internal voltage now at 1.15V (-5% - +10%) */
Listing 20-12. Changing Core Voltage via the On-Chip Regulator (C)
VLEV_field = 0xC;
VR_reg = *pVR_CTL;
VR_reg &= 0xFF0F;
VLEV_field <<= 4;
VR_reg |= VLEV_field;
word */
*pVR_CTL = VR_reg;
IMASK_reg = cli( );
IMASK_reg */
idle( ); /* drain pipeline, enter idled state, wait for PLL
wakeup */
sti(IMASK_reg);
and IMASK */
/* internal voltage now at 1.15V (-5% - +10%) */
20-34
/* R2 contains previous VR_CTL value with
/* write new value to VR_CTL */
/* 0xC = 1.15V (-5% - +10%) in VLEV */
/* read VR_CTL into temporary data */
/* clear out current VLEV field data */
/* shift VLEV field into proper position */
/* deposit new VLEV field into VR_CTL
/* write new value to VR_CTL */
/* disable interrupts, copy IMASK to
/* after PLL wakeup occurs, restore interrupts
ADSP-BF537 Blackfin Processor Hardware Reference