SPORT Registers
Clearing
frame sync pins; it also shuts down the internal SPORT circuitry.
In low power applications, battery life can be extended by clearing
whenever the SPORT is not in use.
TSPEN
All SPORT control registers should be programmed before
set. Typical SPORT initialization code first writes all control regis-
ters, including DMA control if applicable. The last step in the code
is to write
.
TSPEN
• Internal transmit clock select. (
transmit clock (if set) or the external transmit clock on the
pin (if cleared). The
external clock is selected.
• Data formatting type select. The two
mats used for single and multichannel operation.
• Bit order select. (
the data words transmitted over the SPORT.
• Serial word length select. (
ber of bits in each word transmitted over the SPORTs) is
calculated by adding 1 to the value of the
Serial Word Length = SLEN + 1;
The
SLEN
values for this field. Three common settings for the
15, to transmit a full 16-bit word; 7, to transmit an 8-bit byte; and
23, to transmit a 24-bit word. The processor can load 16- or 32-bit
values into the transmit buffer via DMA or an MMR write
12-50
causes the SPORT to stop driving data,
TSPEN
with all of the necessary bits, including
SPORTx_TCR1
TCLKDIV
). The
TLSBIT
SLEN
field can be set to a value of 2 to 31; 0 and 1 are illegal
ADSP-BF537 Blackfin Processor Hardware Reference
). This bit selects the internal
ITCLK
MMR value is not used when an
bits specify data for-
TDTYPE
bit selects the bit order of
TLSBIT
). The serial word length (the num-
field:
SLEN
, and
TSCLK
is
TSPEN
TSCLK
field are
SLEN
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