External Memory Design Issues - Analog Devices Blackfin ADSP-BF537 Hardware Reference Manual

External Memory Design Issues

This section describes design issues related to external memory.
Example Asynchronous Memory Interfaces
This section shows glueless connections to 16-bit wide SRAM. Note this
interface does not require external assertion of
state counter is sufficient for deterministic access times of memories.
Figure 21-1 shows the interface to 8-bit SRAM or flash.
shows the interface to 16-bit SRAM or flash
Figure 21-1. Interface to 8-Bit SRAM or Flash
ADSP-BF537 Blackfin Processor Hardware Reference
ADSP-BF537
ADSP-BF536
ADSP-BF534
[X]
AMS
AOE
AWE
[1:0]
ABE
ADDR[N+1:1]
DATA[7:0]
ARE
ARDY
System Design
, since the internal wait
ARDY
Figure 21-2
8-BIT SRAM
OR FLASH
AMS [X]
OE
R/W OR WR
BE[1:0
A[N:0]
D[7:0]
21-5