Analog Devices Blackfin ADSP-BF537 Hardware Reference Manual page 998

Booting Process
Figure 19-3. Project Flow for a Standalone System
Figure 19-4 shows the boot stream contained in a flash memory device,
which could be of parallel or serial type. In host boot scenarios the
non-volatile memory more likely connects to the host processor rather
than directly to the Blackfin. After reset, the headers are read and parsed
by the on-chip boot ROM, and processed block by block. Payload data is
copied to destination addresses, either in on-chip L1 memory or off-chip
SRAM/SDRAM.
Booting into scratchpad memory (0xFFB0 0000 - 0xFFB0 0FFF) is
not supported. If booting to scratchpad memory is attempted, the
processor hangs within the on-chip boot ROM. Similarly, booting
into the upper 16 bytes of L1 data bank A (0xFF80 7FF0 - 0XFF80
7FFF) is not supported. These memory locations are used by the
boot kernel for intermediate storage of block header information
and cannot be initialized at boot time. After booting, this memory
range can be used by the application during runtime.
19-12
.ASM/.C/.CPP
ASSEMBLER
SOURCE
AND/OR
FILES
COMPILER
B
ADSP-BF534/ADSP-BF536/
ADSP-BF537
PROCESSOR
ADSP-BF537 Blackfin Processor Hardware Reference
.DOJ(s)
LINKER
TARGET SYSTEM
BOOTING
EXTERNAL
UPON RESET
MEMORY
.DXE(s)
LOADER
.LDR