Resetting The Processor - Analog Devices Blackfin ADSP-BF537 Hardware Reference Manual

High Frequency Design Considerations

Resetting the Processor

Our processor pins have no hysteresis and therefore require a monotonic
rise and fall. Therefore even the
directly to an R/C time delay because such a circuit would be noise
sensitive.
In addition to the hardware reset mode provided via the
processor supports several software reset modes. For detailed information
on the various modes, see the ADSP-BF53x/BF56x Blackfin Processor Pro-
gramming Reference Manual. The processor state after reset is also
described in the ADSP-BF53x/BF56x Blackfin Processor Programming Ref-
erence Manual.
Recommendations for Unused Pins
Most often, there is no need to terminate unused pins, but the handful
that do require termination are listed at the end of the pin list description
section of the product data sheet.
If the real-time clock is not used,
Programmable Outputs
Programmable pins used as output pins should be connected to a pullup
or pulldown resistor to prevent damage to other devices during reset and
before these pins are programmed as outputs.
Test Point Access
The debug process is aided by test points on signals such as
, bank selects,
SCLK
are connected directly to power or ground, they are inaccessible under a
BGA chip. Use pull-up and pull-down resistors instead.
21-12
RESET
RTXI
, and
PPICLK RESET
ADSP-BF537 Blackfin Processor Hardware Reference
pin should not be connected
should be pulled low.
. If selection pins such as boot mode
pin, the
RESET
or
CLKOUT