Analog Devices Blackfin ADSP-BF537 Hardware Reference Manual page 1163

I INDEX
Symbols
µ-law companding, 12-24,
Numerics
DMC, 3-8
16-bit flash, booting from,
16-bit flash interface,
16-bit SRAM, interface,
24 hours event flag bit,
24 hours interrupt enable bit,
2D DMA, 5-14
8-bit flash, booting from,
8-bit flash interface, 21-5
8-bit SRAM interface,
A
A[10] pin, 6-55
AAIF bit, 9-25, 9-48
AAIM bit, 9-25, 9-47
AAIS bit, 9-25, 9-47
AAn bit, 9-76
ABE[1:0] pins, 6-18
ABO bit, 9-43
abort acknowledge interrupt, CAN,
abort acknowledge register 1 (CAN_AA1),
abort acknowledge register 2 (CAN_AA2),
aborted frames, MAC,
aborts, DMA, 5-32
acceptance mask filtering, CAN,
acceptance mask register (CAN_AMxxH),
ADSP-BF537 Blackfin Processor Hardware Reference
12-29
19-40
21-5
21-5
18-21
18-20
19-36
21-5
9-25
9-76
9-76
8-16
9-16
9-49
acceptance mask register (CAN_AMxxL),
access denied interrupt, CAN,
accesses
off-core, 2-5
to internal memory,
access to unimplemented address interrupt,
CAN, 9-25
access way⁄ instruction address bit 11 bit,
ACKE bit, 9-85
active descriptor queue, and DMA
synchronization,
active low/high frame syncs, serial port,
active mode, 1-23, 20-9
active mode to full on mode example,
ACTIVE_PLLDISABLED bit,
ACTIVE_PLLENABLED bit,
active video only mode, PPI, 7-10,
ADCs, connecting to,
address bus, 6-8
address filter evaluation, MAC,
address mapping, SDRAM,
ADIF bit, 9-24, 9-48
ADIM bit, 9-24, 9-47
ADIS bit, 9-24, 9-47
alarm clock, RTC, 18-2
alarm event flag bit, 18-21
alarm interrupt enable bit,
A-law companding, 12-24,
AlignmentErrors register,
alternate frame sync mode,
alternate timing, serial port,
AMBEN[2:0] field, 6-19,
9-51
9-24
3-2
3-10
5-64
12-33
20-29
20-26
20-26
7-11
12-1
8-14
6-27
18-20
12-29
8-55
12-36
12-35
6-21
I-1