Final Initialization - Analog Devices Blackfin ADSP-BF537 Hardware Reference Manual

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This conservative behavior lets the host send data with high data rates

without knowing the structure of the boot stream. The most critical speed

path during the entire boot procedure is the time during when the kernel

received the 10th bytes and must still evaluate the block header before it

form these steps:

1. Send the first 10 bytes.

2. Wait until

3. For every further byte, wait until

the next byte.

Final Initialization

After the successful download of the application into the bootable mem-

ory, and before jumping to the

some housekeeping work. Most of the used registers are changed back to

their default state, but some register values may differ for the individual

boot modes. These registers are reset to 0x0:

• UART0_GCTL

• TWI_CONTROL

• MDMA_S0_CONFIG

• MDMA_D0_CONFIG

• MDMA_S1_CONFIG

• MDMA_D1_CONFIG

• DMA7_CONFIG

ADSP-BF537 Blackfin Processor Hardware Reference

. For the highest data rate, the host is encouraged to per-

goes active.

System Reset and Booting

is inactive and then send

vector address, the boot kernel does