External Bus Interface Unit Registers - Analog Devices Blackfin ADSP-BF537 Hardware Reference Manual

External Bus Interface Unit Registers

External Bus Interface Unit Registers
External bus interface unit registers (0xFFC0 0A00 – 0xFFC0 0AFF) are
listed in Table
Table A-11. External Bus Interface Unit Registers
Memory-mapped
Address
0xFFC0 0A00
0xFFC0 0A04
0xFFC0 0A08
0xFFC0 0A10
0xFFC0 0A14
0xFFC0 0A18
0xFFC0 0A1C
A-16
A-11.
Register Name
EBIU_AMGCTL
EBIU_AMBCTL0
EBIU_AMBCTL1
EBIU_SDGCTL
EBIU_SDBCTL
EBIU_SDRRC
EBIU_SDSTAT
ADSP-BF537 Blackfin Processor Hardware Reference
See Page
"Asynchronous Memory Global Control Regis-
ter" on page 6-21
"Asynchronous Memory Bank Control 0 Reg-
ister" on page 6-22
"Asynchronous Memory Bank Control 1 Reg-
ister" on page 6-23
"SDRAM Memory Global Control Register"
on page 6-68
"SDRAM Memory Bank Control Register" on
page 6-63
"SDRAM Refresh Rate Control Register" on
page 6-60
"SDRAM Control Status Register" on
page 6-78