Eeprom Control Register - NEC mPD780973 Series Preliminary User's Manual

4.3 EEPROM Control Register

EEPROM is controlled with the EEPROM write control register (EEWC).
EEWC is set with either a 1-bit or 8-bit memory manipulation instruction.
RESET input sets EEWC to 00H.
Figure 4-2. EEPROM Write Control Register (EEWC) Format
Address: FF90H After Reset : 00H
Symbol 7
EEWC 0
EWCS1
0
0
Other than above
EWCC
0
1
EWST
0
1
EWE
0
1
Notes 1. Set the main system clock frequency (f
2. Set the main system clock frequency (f
Cautions 1. If the main system clock frequency is set in the range of 5.120 < f
cannot be used.
2. When EWE is cleared (to 0) during EEPROM writing, writing is immediately interrupted.
Data that was being written becomes undefined. Be sure to clear EWE before stopping the
main system clock during the write period.
3. After EWCC is cleared (to 0), set a wait time of 20 µ s or more by software to read EEPROM
contents.
4. Be sure to check that EWST is 0 before performing EEPROM access.
5. Bits 3, 6, and 7 must be set to 0.
CHAPTER 4 EEPROM
R/W
6 5 4
0 EWCS1 EWCS0
EWCS0
14 10 Note 1
0 (2 + 2 )/f
X
15 11 Note 2
1 (2 + 2 )/f
X
Setting prohibited
EEPROM Operation Control
Operating mode
EEPROM stop
Not currently writing to EEPROM (EEPROM write/read is enabled. However, when
EWE = 0, write is disabled)
Currently writing to EEPROM (EEPROM write/read is disabled)
EEPROM Write Operation Control
EEPROM write disabled
EEPROM write enabled
) in the range of 4 to 5.120 MHz.
X
) in the range of 5.364 to 8.38 MHz.
X
3 2
0 EWCC
EEPROM Write Time
EEPROM Write Status
1 0
EWST EWE
< 5.364 MHz, the EEPROM
X
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