NEC V850ES/ST2 mPD703220 Manuals

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NEC V850ES/ST2 mPD703220 User Manual (483 pages)

32-bit Single-Chip Microcontroller

Brand: NEC | Category: Microcontrollers | Size: 4 MB

Table of Contents
8
Chapter 1 Introduction

14
- General
  14
- Features
  14
- Application Fields
  15
- Ordering Information
  15
- Pin Configuration (Top View)
  16
- Function Block Configuration
  19
- Internal Block Diagram
  19
- Internal Units
  20
Chapter 2 Pin Functions

22
Chapter 3 Cpu Function

35
- Features
  35
- CPU Register Set
  36
- Program Register Set
  37
- System Register Set
  38
- Operation Modes
  44
- Specifying Operation Mode
  44
- Address Space
  45
- CPU Address Space
  45
- Wrap-Around of CPU Address Space
  46
- Memory Map
  47
- Areas
  49
- Recommended Use of Address Space
  51
- Peripheral I/O Registers
  53
- Special Registers
  59
- Notes
  62
Chapter 4 Port Functions

63
- Features
  63
- Basic Port Configuration
  63
- Port Configuration
  64
- Port 0
  69
- Port 1
  71
- Port 3
  72
- Port 4
  77
- Port 5
  79
- Port 7
  83
- Port 9
  84
- Port CM
  89
- Port CS
  91
- Port CT
  93
- Port DH
  95
- Block Diagrams
  97
- Port Register Settings When Alternate Function Is Used
  120
- Cautions
  125
- Cautions on Setting Port Pins
  125
- Cautions on Bit Manipulation Instruction for Port N Register (Pn)
  126
Chapter 5 Bus Control Function

127
- Features
  127
- Bus Control Pins
  128
- Pin Status When Internal RAM, On-Chip Peripheral I/O, or CS0 to CS3 Is Accessed
  129
- Pin Status in each Operation Mode
  129
- Memory Block Function
  130
- Chip Select Control Function
  131
- External Bus Interface Mode Control Function
  131
- Bus Access
  132
- Number of Clocks for Access
  132
- Bus Size Setting Function
  132
- Access by Bus Size
  133
- Wait Function
  140
- Programmable Wait Function
  140
- External Wait Function
  141
- Relationship between Programmable Wait and External Wait
  141
- Programmable Address Wait Function
  143
- Idle State Insertion Function
  144
- Bus Hold Function
  145
- Functional Outline
  145
- Bus Hold Procedure
  146
- Operation in Power Save Mode
  146
- Bus Priority
  147
- Bus Timing
  148
Chapter 6 Clock Generator

154
- Overview
  154
- Configuration
  154
- Control Registers
  156
- Operation
  157
- Operation of each Clock
  157
- Clock Output Function
  157
- External Clock Input Function
  158
Chapter 7 16-Bit Timer/Event Counter P (Tmp)

159
- Overview
  159
- Functions
  159
- Configuration
  160
- Registers
  162
- Operation
  173
- Interval Timer Mode (Tpnmd2 to Tpnmd0 Bits = 000)
  180
- External Event Count Mode (Tpnmd2 to Tpnmd0 Bits = 001)
  189
- External Trigger Pulse Output Mode (Tpnmd2 to Tpnmd0 Bits = 010)
  197
- One-Shot Pulse Output Mode (Tpnmd2 to Tpnmd0 Bits = 011)
  209
- PWM Output Mode (Tpnmd2 to Tpnmd0 Bits = 100)
  216
- Free-Running Timer Mode (Tpnmd2 to Tpnmd0 Bits = 101)
  225
- Pulse Width Measurement Mode (Tpnmd2 to Tpnmd0 Bits = 110)
  241
- Timer Output Operations
  246
- Cautions
  247
Chapter 8 16-Bit Interval Timer M (Tmm)

248
- Outline
  248
- Configuration
  248
- Control Register
  250
- Operation
  251
- Interval Timer Mode
  251
- Cautions
  255
Chapter 9 Watchdog Timer Functions

256
- Functions
  256
- Configuration
  257
- Control Registers
  258
- Operation
  260
- Operation as Watchdog Timer
  260
- Operation as Interval Timer
  261
Chapter 10 Real-Time Output Function (Rto)

262
- Function
  262
- Configuration
  263
- Control Registers
  265
- Operation
  267
- Usage
  268
- Cautions
  268
Chapter 11 A/D Converter

269
- Overview
  269
- Functions
  269
- Configuration
  270
- Registers
  273
- Operation
  279
- Basic Operation
  279
- Trigger Mode
  281
- Operation Mode
  282
- Cautions
  286
- How to Read A/D Converter Characteristics Table
  290
Chapter 12 D/A Converter

294
- Functions
  294
- Configuration
  294
- Control Registers
  295
- Operation
  297
- Operation in Normal Mode
  297
- Operation in Real-Time Output Mode
  297
- Cautions
  298
Chapter 13 Asynchronous Serial Interface a (Uarta)

299
- CSIB4 and UARTA0 Mode Switching
  299
- Features
  300
- Configuration
  301
- Control Registers
  303
- Interrupt Request Signals
  308
- Operation
  309
- Data Format
  309
- UART Transmission
  311
- Continuous Transmission Procedure
  312
- UART Reception
  314
- Reception Errors
  315
- Parity Types and Operations
  316
- Receive Data Noise Filter
  317
- Dedicated Baud Rate Generator
  318
- Cautions
  325
Chapter 14 3-Wire Variable-Length Serial I/O (Csib)

326
- CSIB4 and UARTA0 Mode Switching
  326
- Features
  327
- Configuration
  328
- Control Registers
  330
- Operation
  336
- Single Transfer Mode (Master Mode, Transmission/Reception Mode)
  336
- Single Transfer Mode (Master Mode, Reception Mode)
  337
- Continuous Mode (Master Mode, Transmission/Reception Mode)
  338
- Continuous Mode (Master Mode, Reception Mode)
  339
- Continuous Reception Mode (Error)
  340
- Continuous Mode (Slave Mode, Transmission/Reception Mode)
  341
- Continuous Mode (Slave Mode, Reception Mode)
  342
- Clock Timing
  343
- Output Pins
  345
- Operation Flow
  346
Chapter 15 Interrupt/Exception Processing Function

352
- Features
  352
- Non-Maskable Interrupts
  355
- Operation
  357
- Restore
  358
- NP Flag
  359
- Maskable Interrupts
  360
- Operation
  360
- Restore
  362
- Priorities of Maskable Interrupts
  363
- Interrupt Control Register (Xxicn)
  367
- Interrupt Mask Registers 0 to 2 (IMR0 to IMR2)
  369
- In-Service Priority Register (ISPR)
  370
- ID Flag
  371
- Watchdog Timer Mode Register (WDTM)
  372
- External Interrupt Request Input Pins (NMI, INTP0 to INTP7)
  373
- Noise Elimination
  373
- Edge Detection
  373
- Software Exception
  378
- Operation
  378
- Restore
  379
- EP Flag
  380
- Exception Trap
  381
- Illegal Opcode Definition
  381
- Debug Trap
  383
- Interrupt Acknowledge Time of CPU
  385
- Periods in Which Interrupts Are Not Acknowledged by CPU
  386
Chapter 16 Standby Function

387
- Overview
  387
- Control Registers
  389
- HALT Mode
  392
- Setting and Operation Status
  392
- Releasing HALT Mode
  392
- IDLE Mode
  394
- Setting and Operation Status
  394
- Releasing IDLE Mode
  394
- STOP Mode
  396
- Setting and Operation Status
  396
- Releasing STOP Mode
  396
- Securing Oscillation Stabilization Time
  398
Chapter 17 Reset Function

399
- Overview
  399
- Configuration
  399
- Operation
  400
Chapter 18 Regulator

403
- Outline
  403
- Operation
  404
Chapter 19 Electrical Specifications

405
Chapter 20 Package Drawings

454
Chapter 21 Recommended Soldering Conditions

456
Appendix A Cautions

457
Appendix B Notes on Target System Design

461
Appendix C Register Index

465
Appendix D Instruction Set List

471
- Conventions
  471
- Instruction Set (in Alphabetical Order)
  474
Appendix E Revision History

481
- Major Revisions in this Edition
  481

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NEC V850ES/ST2 mPD703220 Manuals

NEC V850ES/ST2 mPD703220 User Manual (483 pages)

Table of Contents

Chapter 1 Introduction

Chapter 2 Pin Functions

Chapter 3 Cpu Function

Chapter 4 Port Functions

Chapter 5 Bus Control Function

Chapter 6 Clock Generator

Chapter 7 16-Bit Timer/Event Counter P (Tmp)

Chapter 8 16-Bit Interval Timer M (Tmm)

Chapter 9 Watchdog Timer Functions

Chapter 10 Real-Time Output Function (Rto)

Chapter 11 A/D Converter

Chapter 12 D/A Converter

Chapter 13 Asynchronous Serial Interface a (Uarta)

Chapter 14 3-Wire Variable-Length Serial I/O (Csib)

Chapter 15 Interrupt/Exception Processing Function

Chapter 16 Standby Function

Chapter 17 Reset Function

Chapter 18 Regulator

Chapter 19 Electrical Specifications

Chapter 20 Package Drawings

Chapter 21 Recommended Soldering Conditions

Appendix A Cautions

Appendix B Notes on Target System Design

Appendix C Register Index

Appendix D Instruction Set List

Appendix E Revision History

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