Pwm Mode (Taanmd2 To Taanmd0 = 100 B ) - NEC V850ES/F 3-L Series User Manual

16-Bit Timer/Event Counter AA Chapter 10
10.6.6 PWM mode (TAAnMD2 to TAAnMD0 = 100 )
B
In the PWM mode, TAAn capture/compare register 1 (TAAnCCR1) is used to
set the duty factor and TAAn capture/compare register 0 (TAAnCCR0) is used
to set the cycle. By using these two registers and operating the timer, variable-
duty PWM is output.
Rewriting the TAAnCCR0 and TAAnCCR1 registers is enabled when
TAAnCE = 1.
So that the set values of the TAAnCCR0 and TAAnCCR1 registers are
compared with the value of the 16-bit counter (reloaded to the CCR0 and
CCR1 buffer registers), the TAAnCCR0 register must be rewritten and then a
value must be written to the TAAnCCR1 register before the value of the 16-bit
counter matches the value of the TAAnCCR0 register.
The values of the TAAnCCR0 and TAAnCCR1 registers are reloaded when the
value of the TAAnCCR0 register later matches the value of the 16-bit counter.
Whether the next reload timing is made valid or not is controlled by writing to
the TAAnCCR1 register. Therefore, write the same value to the TAAnCCR1
register even when only the value of the TAAnCCR0 register needs to be
rewritten. Reload is invalid when only the value of the TAAnCCR0 register is
rewritten.
To stop timer AA, clear TAAnCE to 0.
The waveform of PWM is output from the TOAAn1 pin. The TOAAn0 pin
produces a toggle output when the 16-bit counter matches the TAAnCCR0
register.
In the PWM mode, the TAAnCCR0 and TAAnCCR1 registers are used only as
compare registers. They cannot be used as capture registers.
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