Operation As Pwm Output Mode - NEC 78K0S/KA1+ User Manual

8.4.2

Operation as PWM output mode

In PWM output mode, a pulse with an arbitrary duty and arbitrary cycle can be output.
8-bit timer compare register 01 (CMP01) controls the cycle of timer output (TOH1). Rewriting the CMP01 register
during timer operation is prohibited.
8-bit timer compare register 11 (CMP11) controls the duty of timer output (TOH1). Rewriting the CMP11 register
during timer operation is possible.
The operation in PWM output mode is as follows.
TOH1 output becomes active and 8-bit timer counter H1 is cleared to 0 when 8-bit timer counter H1 and the
CMP01 register match after the timer count is started. TOH1 output becomes inactive when 8-bit timer counter H1
and the CMP11 register match.
(1) Usage
In PWM output mode, a pulse for which an arbitrary duty and arbitrary cycle can be set is output.
<1> Set each register.
(i) Setting timer H mode register 1 (TMHMD1)
TMHE1 CKS12
TMHMD1 0 0/1
(ii) Setting CMP01 register
• Compare value (N): Cycle setting
(iii) Setting CMP11 register
• Compare value (M): Duty setting
Remark 00H ≤ CMP11 (M) < CMP01 (N) ≤ FFH
<2> The count operation starts when TMHE1 = 1.
<3> The CMP01 register is the compare register that is to be compared first after count operation is enabled.
When the values of 8-bit timer counter H1 and the CMP01 register match, 8-bit timer counter H1 is cleared,
an interrupt request signal (INTTMH1) is generated, and TOH1 output becomes active. At the same time,
the compare register to be compared with 8-bit timer counter H1 is changed from the CMP01 register to the
CMP11 register.
138
CHAPTER 8 8-BIT TIMER H1
Figure 8-8. Register Setting in PWM Output Mode
CKS11 CKS10 TMMD11
0/1 0/1 1
User's Manual U16898EJ3V0UD
TMMD10 TOLEV1 TOEN1
0 0/1 1
Timer output enabled
Timer output level inversion setting
PWM output mode selection
Count clock (f ) selection
CNT
Count operation stopped