Section 8. Serial Communication Interface; Overview; Features - Hitachi H8/329 Series Hardware Manual

Single-chip microcomputer
Table of Contents

Advertisement

Section 8. Serial Communication Interface

8.1 Overview

The H8/329 Series includes a serial communication interface (SCI) for transferring serial data to
and from other chips. Either synchronous or asynchronous communication can be selected.

8.1.1 Features

The features of the on-chip serial communication interface are:
• Asynchronous mode
The H8/329 Series can communicate with a UART (Universal Asynchronous
Receiver/Transmitter), ACIA (Asynchronous Communication Interface Adapter), or other chip
that employs standard asynchronous serial communication. It also has a multiprocessor
communication function for communication with other processors. Twelve data formats are
available.
— Data length: 7 or 8 bits
— Stop bit length: 1 or 2 bits
— Parity: Even, odd, or none
— Multiprocessor bit: "1" or "0"
— Error detection: Parity, overrun, and framing errors
— Break detection: When a framing error occurs, the break condition can be detected by
reading the level of the RxD line directly.
• Synchronous mode
The SCI can communicate with chips able to perform clocked synchronous data transfer.
— Data length: 8 bits
— Error detection: Overrun errors
• Full duplex communication
The transmitting and receiving sections are independent, so each channel can transmit and
receive simultaneously. Both the transmit and receive sections use double buffering, so
continuous data transfer is possible in either direction.
• Built-in baud rate generator
Any specified baud rate can be generated.
• Internal or external clock source
The SCI can operate on an internal clock signal from baud rate generator, or an external clock
signal input at the SCK pin.
• Four interrupts
TDR-empty, TSR-empty, receive-end, and receive-error interrupts are requested independently.
163

Advertisement

Table of Contents
loading

Table of Contents