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Section 13 Serial Communication Interface3 (SCI3)
Serial Communication Interface3(SCI3) can handle both asynchronous and clocked synchronous
serial communication. Serial data communication can be carried out using standard asynchronous
communication chips such as a Universal Asynchronous Receiver/Transmitter (UART) or an
Asynchronous Communication Interface Adapter (ACIA). A function is also provided for serial
communication between processors (multiprocessor communication function).
Figure 13-1 shows a block diagram of the SCI3.
13.1
Features
• Choice of asynchronous or clocked synchronous serial communication mode
• Full-duplex communication capability
The transmitter and receiver are mutually independent, enabling transmission and reception to
be executed simultaneously.
Double-buffering is used in both the transmitter and the receiver, enabling continuous
transmission and continuous reception of serial data.
• On-chip baud rate generator allows any bit rate to be selected
• External clock or on-chip baud rate generator can be selected as a transfer clock source (except
for in Smart Card interface mode).
• Six interrupt sources
Transmit-end, transmit-data-empty, receive-data-full, overrun error, framing error, and parity
error.
Asynchronous mode
• Data length: 7 or 8 bits
• Stop bit length: 1 or 2 bits
• Parity: Even, odd, or none
• Receive error detection: Parity, overrun, and framing errors
• Break detection: Break can be detected by reading the RxD pin level directly in the case of a
framing error
Clocked Synchronous mode
• Data length: 8 bits
• Receive error detection: Overrun errors detected
Rev. 1.0, 03/01, page 153 of 280
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