Special Registers - NEC V850ES/SA2 UPD703201 Manual

32-bit single-chip microcontrollers
Table of Contents

Advertisement

3.4.8

Special registers

Special registers are registers that are protected from being written with illegal data due to a program hang-up.
The V850ES/SA2 and V850ES/SA3 have the following four special registers.
• Power save control register (PSC)
• Processor clock control register (PCC)
• Watchdog timer mode register (WDTM)
• Backup power status register (BPS)
In addition, a command register (PRCDM) is provided to protect against a write access to the special registers so
that the application system does not inadvertently stop due to a program hang-up. A write access to the special
registers is made in a specific sequence, and an illegal store operation is reported to the system status register (SYS).
(1) Setting data to special registers
Set data to the special registers in the following sequence:
<1>
Disable DMA operation.
<2>
Prepare data to be set to the special register in a general-purpose register.
<3>
Write the data prepared in <2> to the command register (PRCMD).
<3>
Write the setting data to the special register (by using the following instructions).
• Store instruction (ST/SST instruction)
• Bit manipulation instruction (SET1/CLR1/NOT1 instruction)
<5> to <9> Insert NOP instructions (5 instructions).
<10>
Enable DMA operation if necessary.
[Example] With PSC register
ST.Br11, PSMR[r0]
<1>CLR10, DCHCn[r0]
<2>MOV0x02, r10
<3>ST.Br10, PRCMD[r0] ; Write PRCMD register.
<4>ST.Br10, PSC[r0]
<5>NOP
<6>NOP
<7>NOP
<8>NOP
<9>NOP
<10>SET10, DCHCn[r0]
(next instruction)
There is no special sequence to read a special register.
CHAPTER 3 CPU FUNCTION
; Set PSMR register.
; Disable DMA operation. n = 0 to 3
; Set PSC register.
; Dummy instruction
; Dummy instruction
; Dummy instruction
; Dummy instruction
; Dummy instruction
; Enable DMA operation. n = 0 to 3
Preliminary User's Manual U15905EJ1V0UD
89

Advertisement

Table of Contents
loading

Table of Contents