External Event Counter Operation - NEC mPD780024AS Series Preliminary User's Manual

6.4.4 External event counter operation

The external event counter counts the number of external clock pulses to be input to the TI00/TO0/P70 pin with
the 16-bit timer counter 0 (TM0).
TM0 is incremented each time the valid edge specified with the prescaler mode register 0 (PRM0) is input.
When the TM0 counted value matches the 16-bit timer capture/compare register 00 (CR00) value, TM0 is cleared
to 0 and the interrupt request signal (INTTM00) is generated.
Input the value except 0000H to CR00 (count operation with a pulse cannot be carried out).
The rising edge, the falling edge, or both edges can be selected with bits 4 and 5 (ES00 and ES01) of prescaler
mode register 0 (PRM0).
Because operation is carried out only after the valid edge is detected twice by sampling with the internal clock (f
3
2 ), noise with short pulse widths can be eliminated.
Caution When used as an external event counter, the P70/TI00/TO0 pin cannot be used as timer output
(TO0).
Figure 6-21. Control Register Settings in External Event Counter Mode
TMC0 0 0 0
CRC0 0 0 0
Remark 0/1: Setting 0 or 1 allows another function to be used simultaneously with the external event counter.
See Figures 6-2 and 6-3.
124
CHAPTER 6 16-BIT TIMER/EVENT COUNTER 0
(a) 16-bit timer mode control register 0 (TMC0)
TMC03 TMC02 TMC01 OVF0
0 1 1 0/1 0
(b) Capture/compare control register 0 (CRC0)
CRC02 CRC01 CRC00
0 0 0/1 0/1 0
Preliminary User's Manual U16035EJ1V0UM
Clears and starts on match between TM0 and CR00
CR00 as compare register
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