Master Transmission - NEC 78K0R/KE3 User Manual

16-bit single-chip microcontrollers
Table of Contents

Advertisement

11.5.1 Master transmission

Master transmission is that the 78K0R/KE3 outputs a transfer clock and transmits data to another device.
3-Wire Serial I/O
Target channel
Channel 0 of SAU0
Pins used
SCK00, SO00
Interrupt
INTCSI00
Transfer end interrupt (in single-transfer mode) or buffer empty interrupt (in continuous transfer mode)
can be selected.
Error detection flag
None
Transfer data length
7 or 8 bits
Transfer rate
Max. f
Data phase
Selectable by DAP0n bit
• DAP0n = 0: Data output starts from the start of the operation of the serial clock.
• DAP0n = 1: Data output starts half a clock before the start of the serial clock operation.
Clock phase
Selectable by CKP0n bit
• CKP0n = 0: Forward
• CKP0n = 1: Reverse
Data direction
MSB or LSB first
Note Use this operation within a range that satisfies the conditions above and the AC characteristics in the electrical
specifications (see CHAPTER 27
CHAPTER 28 ELECTRICAL SPECIFICATIONS ((A) GRADE PRODUCTS)).
Remark
n: Channel number (n = 0, 2)
CHAPTER 11 SERIAL ARRAY UNIT
CSI00
/(2 × 2
× 128) [Hz]
11
/4 [Hz], Min. f
CLK
CLK
ELECTRICAL SPECIFICATIONS (STANDARD PRODUCTS) and
User's Manual U17854EJ9V0UD
Channel 2 of SAU0
SCK10, SO10
INTCSI10
Note
f
: System clock frequency
CLK
CSI10
367

Advertisement

Table of Contents
loading

Table of Contents