Cpu Core And Instruction Set; Registers; Accumulator (A) - Motorola MC68HC05T16 Technical Data Manual

CPU CORE AND INSTRUCTION SET

This section provides a description of the CPU core registers, the instruction set and the
addressing modes of the MC68HC05L1.
11.1

Registers

The MCU contains five registers, as shown in the programming model of Figure 11-1. The interrupt
stacking order is shown in Figure 11-2.
15
15
0 0 0 0 0 0 0 0 1 1
11.1.1

Accumulator (A)

The accumulator is a general purpose 8-bit register used to hold operands and results of
arithmetic calculations or data manipulations.
MC68HC05L1
11
7 0
7 0
7 0
7 0
7 0
1 1 1 H I N Z C
Figure 11-1 Programming model
CPU CORE AND INSTRUCTION SET
Accumulator
Index register
Program counter
Stack pointer
Condition code register
Carry / borrow
Zero
Negative
Interrupt mask
Half carry
11
TPG
MOTOROLA
11-1