Overview - Fujitsu MB91260B Series Hardware Manual

CHAPTER 10 PWC (Pulse Width Count: Pulse Width Measurement)
10.1

Overview

This section explains the pulse width measurement function for input signal.
There are two sets of a channel in total, which consists of one 16-bit up counter, one
input pulse divider and divide-by rate control register, one measurement input pin, and
one 16-bit control register. They implement the following functions.
■ Pulse Width Measurement Function
Measure the time between arbitrary events of external pulse inputs.
Internal clock to be used as the criterion can be selected from one of the following 3 types.
(4/16/32 division of machine clock)
Measurement mode
Enable to measure the cycle after an input pulse divided by 2n (n = 1, 2, 3, 4, 5, 6, 7, 8) with the 8-bit input
divider.
Enable to generate an interrupt request when the measurement is completed.
Enable to select either the one-time-only measurement or the continuous measurement.
■ Register List
Address
0000E9
H
0000E0 0000E1
H H
0000E2 0000E3
H H
0000EB
H
0000E4 0000E5
H H
0000E6 0000E7
H H
184
"H" pulse width (↑ to ↓)/"L" pulse width (↓ to ↑)
Rising cycle (↑ to ↑)/Falling cycle (↓ to ↓)
Measurement between edges (↑ or ↓ to ↓ or ↑)
Bit15 to Bit8 Bit7 to Bit0
PWCSR0
PWCR0
PWCSR1
PWCR1
PDIVR0 Ratio of dividing frequency control register 0
Control/status register 0
Data buffer register 0
PDIVR1 Ratio of dividing frequency control register 1
Control/status register 1
Data buffer register 1