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Addressing
Addressing Mode ............................................................ 391
Addressing Area
Direct Addressing Area ...............................................26
ADMD
A/D Mode Setting Register(ADMD: ADMD0 to ADMD2)
......................................................................... 333
ADTRGC
A/D Trigger Control Register (ADTRGC) ..................... 226
AF200 Flash
System Configuration of AF200 Flash Microcontroller
Programmer (Yokogawa Digital Computer
Corporation) .................................................... 435
AICR
Analog Input Control Register
(AICR: AICR0 to AICR2) .............................. 340
Analog Input Control Register (AICR:AICR0 to AICR2)
......................................................................... 111
Analog Input Control Register
Analog Input Control Register
(AICR: AICR0 to AICR2) .............................. 340
Analog Input Control Register (AICR:AICR0 to AICR2)
......................................................................... 111
Architecture
Internal Architecture.......................................................... 28
Assembler
Assembler (fasm911) ...................................................... 456
Asynchronous
Asynchronous (Start-stop Synchronization) Mode
......................................................................... 314
Watchdog Timer Control Register
RSRR: Reset Source Register/watchdog Timer Control
Register.............................................................. 77
Automatic Algorithm
Automatic Algorithm Execution Status .......................... 404
B
Base Clock Divide Ratio Setting Register
DIVR0: Base Clock Divide Ratio Setting Register 0
........................................................................... 85
DIVR1: Base Clock Divide Ratio Setting Register 1
........................................................................... 88
Basic Block Diagram
Basic Block Diagram of I/O Ports................................... 102
Basic Configuration
Basic Configuration of the Serial Programming Connection
......................................................................... 432
Basic Programming
Basic Programming Model................................................ 33
Baud Rate
Calculation of Baud Rate ................................................ 302
Bit Ordering
Bit Ordering....................................................................... 40
Block Diagram
Basic Block Diagram of I/O Ports................................... 102
Block Diagram......................... 4
Block Diagram of 8/10-bit A/D Converter......................325
Block Diagram of 8/10-bit A/D Converter Pin
,
44
................................................................ 110
Block Diagram of Flash Memory ....................................405
Block Diagram of Multifunctional Timer .......................206
PWC Block Diagram .......................................................185
Reload Timer Block Diagram..........................................153
Block Size
Block Size........................................................................390
Block Transfer
Block Transfer .................................................................398
Branch Operation
Branch Operation with Delay Slot.....................................45
Branch Operation without Delay Slot ...............................47
Branching Command
JMP Instruction (Branching Command)..........................366
BSD
0 Detection Data Register (BSD0) ..................................146
1 Detection Data Register (BSD1) ..................................146
BSDC
Change Point Detection Data Register (BSDC) ..............147
BSRR
Detection Result Register (BSRR) ..................................147
Burst Transfer
Burst Transfer ..................................................................399
Burst Two-cycle Transfer
Burst Two-cycle Transfer ................................................388
Bus Converter
↔
32-bit
16-bit Bus Converter .........................................30
↔
Harvard
Princeton Bus Converter ................................30
Bus Modes
Bus Modes .........................................................................62
BUSY
Ready/Busy Signal (RDY/BUSY)...................................420
Busy Signal
Ready/Busy Signal (RDY/BUSY)...................................420
Byte Ordering
Byte Ordering ....................................................................40
C
C Compiler
C Compiler (fcc911) ........................................................453
Calculating
Calculating Function........................................................360
Cancel
Temporary Sector Protect Cancel....................................429
Cancel Request
Hold Request Cancel Request .........................................124
Cascade Mode
Cascade Mode..................................................................302
Change Point
Change Point Detection ...................................................149
INDEX
,
,
,
,
,
,
117
131
142
145
168
,
,
,
298
306
352
370
,
329
481
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