Fujitsu MB91260B Series Hardware Manual page 274

■ Waveform Generator Interrupts
See Table 11.5-4 for waveform generator interrupt control bits and interrupt causes.
Table 11.5-4 Waveform Generator Interrupt Control Bits and Interrupt Causes
Interrupt request flag bit
Interrupt request enable bit
Interrupt cause
In the waveform generator, when a 16-bit dead timer underflow occurs, and TMD8 to TMD0 of the DTCR
0, DTCR1, and DTCR2 register (higher-order bits are 10 to 8, and lower-order bits are 2 to 0) are "000
"001 ", TMIF0 to TMIF2 (higher-order bit is 12, and lower-order bit is 4) of the 16-bit dead timer control
B
register (DTCR0, DTCR1, and DTCR2) are set to "1". When interrupt requests are enabled in this state
(DTCR0, DTCR1, and DTCR2 register TMIE0 to TMIE2 (upper-order bit is 11, lower-order bit is 3) = 1),
interrupt requests are outputted to the interrupt controller.
16-bit Dead Timer 0, 1, 2
TMIF0 to TMIF2 (upper order is bit12, lower
order is bit4) of the 16-bit dead timer control
register higher order and lower order (DTCR0,
DTCR1, DTCR2)
TMIE0 to TMIE2 (upper order is bit11, lower
order is bit3) of the 16-bit dead timer control
register higher order and lower order (DTCR0,
DTCR1, DTCR2)
16-bit dead timer 0, 1, and 2 underflow
CHAPTER 11 MULTIFUNCTIONAL TIMER
Waveform Generator
DTIF (bit6) of waveform control
register 1 (SIGCR1)
"L" level detected in DTTI.
DTTI0
−
" or
B
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