Fujitsu MB91260B Series Hardware Manual page 88

CHAPTER 3 CPU AND CONTROL UNITS
oscillation stabilization wait time for the oscillator circuit or the used PLL lock wait time, whichever time
is longer, is required. Set the longer oscillation stabilization wait time before entering the stop mode.
If the clock oscillator circuit selected as the source clock has been set to operate even in the stop mode, the
PLL stops operation. Set the oscillation stabilization wait time to a value other than OS1, OS0 = 0, 0
before entering the stop mode.
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