Fujitsu MB91260B Series Hardware Manual page 140

32-bit microcontroller
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Table 5.3-2 Settings of Interrupt Levels for Which Hold Request Cancel Request Is
HRCL Register
After reset, DMA transfer is suppressed for any level of interrupt. Since DMA transfer is not executed with
an interrupt generated, set the HRCL register to an appropriate value.
■ Returning from Standby Mode (Stop or Sleep Mode)
This module provides the function to return from stop mode when an interrupt request occurs.
If any interrupt request (with an interrupt level other than 11111
peripheral resource, this module issues a request to the clock control unit to return from stop mode.
Since the priority evaluation circuit restarts operation after the clock supply recovers after returning from
the stop mode, the CPU continues to execute instructions until a priority evaluation result is obtained.
Even after returning from the sleep state, this module operates in the same way. Note also that the registers
in this module are accessible even in sleep mode.
Notes:
• Even an NMI request causes return from stop mode. This assumes however that an input level
valid in the stop state is given to the NMI pin.
• To prevent an interrupt source from causing return from the stop or sleep state, use the relevant
control register of the corresponding peripheral resource to set the interrupt level to "11111
■ Example of Using the Hold Request Cancel Register (HRCL)
To execute a high-priority process during DMA transfer, the CPU must request the DMA controller to
cancel the hold request for releasing itself from the hold status. That is, the HRCL can use an interrupt to
make the DMA controller to cancel a hold request, or to give priority to the CPU.
Control registers
Hold request cancel level (HRCL) register:
If an interrupt request of a higher level than that set in this register is generated, a hold request cancel
request is issued to the DMA controller. This register is used to set that reference level.
Interrupt control register (ICR):
A higher level than that in the HRCL register is set in the ICR register corresponding to the interrupt
source to be used.
Generated
Interrupt Level for Which Cancel Request Is Generated
16
NMI only
17
NMI or interrupt level 16
18
NMI or interrupt level 16/17
31
NMI or interrupt level 16 to 30 [initial value]
CHAPTER 5 INTERRUPT CONTROLLER
), including an NMI, occurs from a
B
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B
125

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