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Overriding DMA
• On the FR family, if an interrupt with a higher priority occurs during DMA transfer, DMA transfer halts
and control branches to the interrupt routine. This mechanism remains active while the interrupt request
is present. The DMA halt is not operated as soon as the interrupt is cleared, and so the DMA transfer
restarts from inside the interrupt handler routine. Accordingly, in handler routines for interrupts with a
level that causes DMA transfer to be halted, use the DMA halt function if you wish to prevent DMA
from restarting as soon as the interrupt is cleared. The DMA halt function is invoked by writing a non-
zero value to the DMAH3 to DMAH0 bits in the DMA overall control register. The override is cleared
by setting the bits back to zero.
• This function is primarily used in interrupt handler routines. Increment the DMA halt register by one in
the interrupt handler routine before clearing the interrupt. This prevents any subsequent DMA transfer.
When interrupt processing is completed, decrement the DMAH3 to DMAH0 bits by one before exiting
the routine. If multiple interrupts have occurred, DMA transfer continues to be suppressed since the
DMAH3 to DMAH0 bits are not "0" yet. If a single interrupt has occurred, the DMAH3 to DMAH0 bits
become "0". DMA requests are then enabled immediately.
Notes:
• Since the register has only four bits, this function cannot be used for multiple interrupts exceeding
15 levels.
• Be sure to assign the priority of the DMA tasks at a level that is at least 15 levels higher than
other interrupt levels.
■ Operation Start
Starting of DMA transfer is controlled independently for each channel, but before transfer starts, the
operation of all channels needs to be enabled.
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Operation enable of all channels
Before activating each DMAC channel, operation for all channels needs to be enabled in advance with the
DMA operation enable bit (DMAE of DMACR). All start settings and transfer requests that occurred
before operation is enabled are invalid.
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Transfer starting
The transfer operation can be started by the operation enable bit of the control register for each channel. If a
transfer request to an activated channel is accepted, the DMA transfer operation is started in the specified
mode.
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Starting from a temporary stop
If a temporary stop occurs before starting with channel-by-channel or all-channel control, the temporary
stopped state is maintained even though the transfer operation is started. If transfer requests occur in the
meantime, they are accepted and retained. When temporary stopping is released, transfer is started.
CHAPTER 16 DMAC (DMA Controller)
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