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CHAPTER 17 FLASH MEMORY
17.1
Overview of Flash Memory
The MB91F264B contains 256 KB (2 M bits) flash memory. This internal flash memory
can be erased in all sectors together or in sector units by a single power supply voltage
of 3.3 V, and can be written in halfword (16 bits) units via the FR-CPU.
■ Overview of Flash Memory
This flash memory is an internal 256 KB flash memory that operates on 3.3 V. This is the same (except for
the capacity and some sector structures) as the Fujitsu MBM29LV400TC 4 M bits (512K bytes × 8 / 256K
bytes × 16) flash memory, and supports writing with a device-external ROM writer. In addition to the
features equivalent to the MBM29LV400TC, instructions and data can be read in word units (32 bits) when
the flash memory is used as FR-CPU internal ROM, enabling high speed device operation.
Along with this manual, refer to the MBM29LV400TC Data Sheet.
This flash memory supports the following features by combining the flash memory macro and the FR-CPU
interface circuits:
• Features for use as CPU memory, for storing programs and data
- Accessibility through 32-bit bus width when used as ROM
- Allowing read, write, and erase (automatic program algorithm
• Features of a single flash memory product equivalent to MBM29LV400TC
Allowing read, write, and erase (automatic program algorithm
*: Automatic program algorithm= Embedded Algorithm™
This section explains use of the flash memory accessed from the FR-CPU.
For information on using the flash memory accessed from a ROM writer, see the instruction manual
provided with the ROM writer.
■ Automatic Algorithm Execution Status
When the automatic algorithm is started in CPU programming mode, the operation status of the automatic
algorithm can be checked using the internal ready signal (RDY). The level of this signal can be read as the
RDY bit in the flash memory status register.
When the RDY bit is set to "0", data is being written or erased with the automatic algorithm, and no write
or erase command can be accepted. Moreover, data cannot be read from any address in flash memory.
Data read while the RDY bit set to "0" is a hardware sequence flag to indicate flash memory status (see
"17.4 Starting the Flash Memory Automatic Algorithm").
404
*
) by the CPU
*
) by a ROM writer
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