Fujitsu MB91260B Series Hardware Manual page 138

Table 5.3-1 Interrupt Sources, Interrupt Numbers, and Interrupt Levels (3 / 3)
Interrupt Source
PWC1 (Overflow)
ICU 0 (Capture)
ICU 1 (Capture)
ICU 2/3 (Capture)
OCU0/1 (Match)
OCU2/3 (Match)
OCU4/5 (Match)
Delayed interrupt source bit
System-reserved (used by REALOS)
System-reserved (used by REALOS)
System-reserved
System-reserved
System-reserved
System-reserved
System-reserved
System-reserved
System-reserved
System-reserved
System-reserved
System-reserved
System-reserved
System-reserved
System-reserved
System-reserved
Used by INT instruction
Interrupt No.
Hexa-
Decimal
decimal
56 38
57 39
58 3A
59 3B
60 3C
61 3D
62 3E
63 3F
64 40
65 41
66 42
67 43
68 44
69 45
70 46
71 47
72 48
73 49
74 4A
75 4B
76 4C
77 4D
78 4E
79 4F
80 50
to to
255 FF
CHAPTER 5 INTERRUPT CONTROLLER
Interrupt
Offset
Level
31C
ICR40
H
318
ICR41
H
314
ICR42
H
310
ICR43
H
30C
ICR44
H
308
ICR45
H
304
ICR46
H
300
ICR47
H
2FC
–
H
2F8
–
H
2F4
–
H
2F0
–
H
2EC
–
H
2E8
–
H
2E4
–
H
2E0
–
H
2DC
–
H
2D8
–
H
2D4
–
H
2D0
–
H
2CC
–
H
2C8
–
H
2C4
–
H
2C0
–
H
2BC
H
– to
000
H
TBR Default
RN
Address
000FFF1C
–
H
000FFF18
–
H
000FFF14
–
H
000FFF10
–
H
000FFF0C
–
H
000FFF08
–
H
000FFF04
–
H
000FFF00
–
H
000FFEFC
–
H
000FFEF8
–
H
000FFEF4
–
H
000FFEF0
–
H
000FFEEC
–
H
000FFEE8
–
H
000FFEE4
–
H
000FFEE0
–
H
000FFEDC
–
H
000FFED8
–
H
000FFED4
–
H
000FFED0
–
H
000FFECC
–
H
000FFEC8
–
H
000FFEC4
–
H
000FFEC0
–
H
000FFEBC
H
to –
000FFC00
H
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