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CHAPTER 16 DMAC (DMA Controller)
■ Block Diagram
Request DMA transfer
to bus controller
Read
Write
To bus
controller
Access
Address
370
Figure 16.1-1 Block Diagram of DMAC 5ch
Counter
Buffer
Selector
DTC 2-step register
CR
Counter
Buffer
Selector
Control read/write
BLK register
DMASA 2-step register
Write back
DMADA 2-step register
Write back
DMA start factor
selection circuit
&
Control the request
receiving
DTCR
DSS[3:0]
Priority circuit
ERIR,EDIR
TYPE.MOD,WS
Status transition
circuit
DMA control
SADM,SASZ[7:0]
SADR
DADM,DASZ[7:0]
DADR
Input peripheral start request/stop
IRQ[4:0]
To interrupt controller
Clear peripheral interrupt
MCLREQ
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