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CHAPTER 11 MULTIFUNCTIONAL TIMER
Table 11.4-7 Input Capture State Control Register (ch.2, ch.3), Upper Byte (ICSH23)
Bit Name
bit15
bit14
bit13
Unused bit
bit12
bit11
bit10
IEI3:
Valid edge
bit9
indication bit
(input capture3)
IEI2:
Valid edge
bit8
indication bit
(Input capture 2)
238
• The read value is indeterminate.
• Writing to these bits have no effect on operation.
• This bit is a valid edge indication bit of the capture register 3, and indicates that the rising or
falling edge was detected.
• When the falling edge is detected, "0" is written to this bit.
• When the rising edge is detected, "1" is written to this bit.
• This bit is a read-only bit.
Note:
When the lower of the input capture state control register (ICSL23), EG31, EG30: bit3,bit 2 =
00
, the read value has no meaning.
B
• This bit is a valid edge indication bit of the capture register 2, and indicates that the rising or
falling edge was detected.
• When the falling edge is detected, "0" is written to this bit.
• When the rising edge is detected, "1" is written to this bit.
• This bit is a read-only bit.
Note:
When the lower of the input capture state control register (ICSL23), EG21, EG20: bit1, bit0 =
00
, the read value has no meaning.
B
Function
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