CHAPTER 7 REALOS-RELATED HARDWARE
7.1
Delayed Interrupt Module
The delayed interrupt module generates an interrupt for switching tasks.
Use this module to allow software to generate and clear an interrupt request for the
CPU.
■ Register List
Address
00000044
H
■ Block Diagram
142
7
6
5
–
–
–
Figure 7.1-1 Block Diagram
R-bus
Interrupt request
4
3
2
1
–
–
–
–
DLYI
← Bit No.
0
DLYI
DICR
[R/W]