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■ Reset Operation Modes
The operation initialization reset (RST) has two modes: normal (asynchronous) reset and synchronous reset
modes. Either can be selected with the SYNCR bit (bit9) in the TBCR (timebase counter control register).
The reset mode setting is initialized only at a setting initialization reset (INIT).
The setting initialization reset (INIT) is always performed as an asynchronous reset.
The operation in each reset mode is detailed below.
●
Normal reset operation
The normal reset operation means the operation of prompt transition to the operation initialization reset
(RST) state as soon as an operation initialization reset (RST) request is issued.
On receipt of a reset (RST) request in the normal reset mode, the device enters the reset (RST) state
promptly regardless of the operation status of internal bus access.
This mode does not guarantee the result of the bus access being performed at the transition to each state.
The mode can however accept the operation initialization reset (RST) request without fail.
The normal reset mode is selected when the SYNCR bit (bit9) in the TBCR (timebase counter control
register) contains "0".
The initial value immediately after a setting initialization reset (INIT) occurs selects the normal reset mode.
●
Synchronous reset operation
The synchronous reset operation means the operation of transition to the operation initialization reset (RST)
state after all bus accesses stop when an operation initialization reset (RST) request is issued.
In the synchronous mode, even though a reset (RST) request is received, the device does not enter the reset
(RST) state while any internal bus access is being performed.
When the above request is received, a sleep request is issued to the internal buses. When each internal bus
terminates operation to enter the sleep state, the device enters the operation initialization reset (RST) state.
Since all bus accesses stop before the device enters each state in this mode, their results are guaranteed. If
any bus access does not stop for some reason, however, the device cannot accept the reset request in that
period of time. (Even in this case, the setting initialization reset (INIT) takes effect immediately.)
Bus access won't terminate in the following cases.
•
When RDY (ready request) has been input to the external extended bus interface, enabling the bus wait
state.
The initial value immediately after a setting initialization reset (INIT) occurs returns the device to the
normal reset mode.
Note:
The DMA controller does not delay the transition to each state as it stops transfer on receipt of each
request.
The synchronous reset mode is selected when the SYNCR bit (bit9) in the TBCR (timebase counter
control register) contains "1".
CHAPTER 3 CPU AND CONTROL UNITS
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