Fujitsu MB91260B Series Hardware Manual page 487

APPENDIX E Instruction Lists
Appendix Table E-16 32-Bit Normal Branch Macro Instruction
Mnemonic
*CALL32 label32,Ri
*BRA32 label32,Ri
*BEQ32 label32,Ri
*BNE32 label32,Ri
*BC32 label32,Ri
*BNC32 label32,Ri
*BN32 label32,Ri
*BP32 label32,Ri
*BV32 label32,Ri
*BNV32 label32,Ri
*BLT32 label32,Ri
*BGE32 label32,Ri
*BLE32 label32,Ri
*BGT32 label32,Ri
*BLS32 label32,Ri
*BHI32 label32,Ri
[Reference 1] CALL32
(1) If label32-PC-2 is between -0x800 and +0x7fe, the following instruction will be generated:
CALL label12
(2) If label32-PC-2 is outside the range of (1) or contains an external reference symbol, the following instruction will be
generated:
LDI:32 #label32,Ri
CALL @Ri
[Reference 2] BRA32
(1) If label32-PC-2 is between -0x100 and +0xfe, the following instruction will be generated:
BRA label9
(2) If label32-PC-2 is outside the range of (1) or contains an external reference symbol, the following instruction will be
generated:
LDI:32 #label32,Ri
JMP @Ri
[Reference 3] Bcc32
(1) If label32-PC-2 is between -0x100 and +0xfe, the following instruction will be generated:
Bcc label9
(2) If label32-PC-2 is outside the range of (1) or contains an external reference symbol, the following instruction will be
generated:
Bxcc false xcc is the opposite condition of cc.
LDI:32 #label32,Ri
JMP @Ri
false:
472
Operation
Address of the next instruction ->RP,
label32->PC
label32->PC
if(Z==1) then label32->PC
↑ s/Z==0
↑ s/C==1
↑ s/C==0
↑ s/N==1
↑ s/N==0
↑ s/V==1
↑ s/V==0
↑ s/V xor N==1
↑ s/V xor N==0
↑ s/(V xor N) or Z==1
↑ s/(V xor N) or Z==0
↑ s/C or Z==1
↑ s/C or Z==0
Remarks
Ri: Temporary register (See Reference 1)
Ri: Temporary register (See Reference 2)
Ri: Temporary register (See Reference 3)
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