Fujitsu MB91260B Series Hardware Manual page 176

■ Operating States of the Counter
The CNTE bit of the control register and the internal signal WAIT determine the counter status. The states
that can be set include the stop state, when CNTE=0 and WAIT=1 (STOP state); the startup trigger wait
state, when CNTE=1 and WAIT=1 (WAIT status); and the operation state, when CNTE=1 and WAIT=0
(RUN state). Figure 8.4-5 shows the state transitions.
Reset Reset
WAITST AITST CNTE=1, WAIT=1
Counter: Holds the value when it
stops
Undefined right after reset
until data is loaded
Figure 8.4-5 Status Transitions of Counter
STOP OP CNTE=0, WAIT=1
Counter: Holds the value when it
stops
Undefined right after reset
CNTE=1
TRG=0
RELD•UF
TRG=1
LOAD AD CNTE=1,WAIT=0
Loads contents of reload register into counter
CHAPTER 8 16-BIT RELOAD TIMER
State transition due to hardware
State transition due to register access
CNTE=1
TRG=1
RUN UN CNTE=1, WAIT=0
Counter: Running
TRG=1
RELD•UF
Load completed
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